Enhancement of Nonvolatile-memory Performance by Using Multiply-stacked Ge Nanodots Prepared at Room Temperature
J. Korean Phy. Soc. 2010; 57: 742~745
Published online October 15, 2010 © 2010 The Korean Physical Society.

Abstract
One-to-three-period multilayers (MLs) of Ge nanodots (NDs) for nonvolatile memories (NVMs) have been self-assembled at room temperature by ion beam sputtering deposition of 5-monolayer Ge between SiO2 layers. Using the structure of 4-nm tunnel oxide/Ge-ND MLs (middle oxide: 2 nm)/15-nm control oxide, NVM MOSFET devices were fabricated based on the 0.6-mm CMOS standard processes. The size and distribution of the Ge NDs were almost not changed after the device-fabrication processes. The memory window and program speed increased from 1.1 to 1.7 V and from 10 ms to 500 ms at +18 V, respectively with increasing period from 1 to 3. The programmed threshold voltages in the cycling behaviors were almost constant within about 0.05 V up to ~104 program/erase cycles for the two- and three- period devices. In contrast, the erased threshold voltages showed a drift-up for all devices with the drift-up decelerated in larger-period devices. The charge-loss rate was also reduced for larger-period devices.
Keywords: Room-temperature growth, Nonvolatile memories, Ion beam sputtering deposition, Ge-nanodot multilayers


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